Semiconductor memory circuits have heretofore been fabricated with reference cells to produce a reference signal for comparison with the output signal from a memory cell. In memory circuits having static references, the reference signal is generated as a fixed voltage which does not vary despite cycling of the memory. At rapid cycling speeds the data signal read from the memory cells can shift as compared to low speed operation thereby reducing the margin between the data voltage and the reference signal voltage. Rapid accessing of such parts can further cause the signal margin at one reference level to become very small thereby increasing the probability of incorrectly reading a data state. Conventional memory circuits have further suffered loss of signal margin due to manufacturing variations and to differences in drive voltages applied to the memory and reference cells.
In view of the above problems encountered in the reading of a memory cell in a semiconductor memory there exists a need for a sensing circuit for use in such a semiconductor memory wherein the memory cells and reference cells track with manufacturing tolerances and receive the same drive voltage for consistent operation. There further exists a need for a sensing circuit wherein the reference signal is dynamic in response to rapid accessing of the memory and the signal margin between the data voltage and the reference signal voltage is sustained to maintain the validity of the data.